This invention concerns the improvement of a MOS IC pull-up circuit, specifically a MOS IC with a new pull-up circuit which includes a boosted signal for dynamic memory elements and the like, in which the boosted signal output is statically held.
In the past, in for example a word wire drive circuit or bit wire precharge circuit, etc. of a dynamic memory element, a pull-up circuit was used to statically hold the signal output that is boosted to above the power source voltage while it is active.
FIG. 3 illustrates the output portion of the conventional timing generation circuit used to generate the boosted signal.
In FIG. 3, (1) is the timing generation circuit, which is of such a configuration that the output signal .phi.OUT is boosted by the boosting MOS capacitance (2). .phi.A is an active signal of a value equal to the power source voltage level output during the active period to enable the output signal .phi.OUT to attain high potential, which functions as a pull-up element during the active period of the MOS type electric field effect transistor (hereinafter simply referred to as MOSFET), conducting to effect a pull-up operation when the output signal .phi.OUT is of a lower value than the power source voltage Vcc (not shown) (Vcc-Vt) where Vt is the threshold voltage of MOSFET (3). This type of conventional circuit had the following inherent problems.
Namely, in FIG. 3, the pull-up element (3) does not function when the output signal level of .phi.OUT is (VCC-Vt) or more. Therefore, even if the output signal .phi.OUT is set to a value equal or higher than the power source voltage (Vcc+Vb), the MOSFET (3) is interrupted during the active state, the output potential decreases due to various types of leaking currents, and the potential at which MOSFET (3) becomes active gradually drops, as shown in FIG. 4.
When a signal with these types of characteristics is used with a word wire drive signal or bit wire precharge signal of a dynamic memory element, limitations on the maximum cycle period and refresh time occur.
Furthermore, in the circuit in FIG. 3, when MOS 3 becomes active immediately after power is turned on when this circuit is used, for example, in a bit wire precharge signal of a dynamic memory element, while the timing generation circuit (1) is not initialized or the synchronous signal to operate the timing generation circuit is not input, MOSFET3 is the only signal output as shown in FIG. 5, and (Vcc-Vt) becomes the upper limit of pull-up voltage.
Therefore, in a normal dynamic memory element, several cycles of synchronous signals must be input to initialize the timing generation circuit (1) and a dummy cycle provided to output a normal boosted signal output .phi.OUT.